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[VHDL-FPGA-Verilog] cntl_ddr3(xilinx)

Description: xilinx ddr3最新VHDL代码,通过调试-xilinx ddr3 latest VHDL code through debugging
Platform: | Size: 101376 | Author: zhang chi | Hits:

[VHDL-FPGA-Verilog] source

Description: altera DDR3 逻辑测试代码，这是工程实际调试好的代码，保证能用。-altera DDR3 vhdl code
Platform: | Size: 420864 | Author: ww | Hits:

[VHDL-FPGA-Verilog] DDR3-SDRAM-Controller

Description: DDR3的控制器（并带有Testbench），可烧录到FPGA中对内存进行读写，相关技术人员可在该代码上修改用于其他场合-DDR3 controller (with an Testbench), the FPGA can be burned to the memory read and write, the relevant technical staff can modify the code to be used on other occasions
Platform: | Size: 242688 | Author: 杨凯 | Hits:

[VHDL-FPGA-Verilog] vc707-mig-rdf0160-14.3

Description: 适用于DDR3 控制器代码等的FPGA代码-DDR3 controller code for FPGA code, etc.
Platform: | Size: 12792832 | Author: 丁妮 | Hits:

[VHDL-FPGA-Verilog] ddr3_mcb1

Description: 基于SPARTAN 6 的DDR3的实现。-The Verilog code for DDR3 on the SPARTAN 6
Platform: | Size: 9409536 | Author: steven | Hits:

[VHDL-FPGA-Verilog] ddr3

Description: VHDL code sample.this files is the VHDL code for using of DDR3 and DDR2 SDRAM.
Platform: | Size: 7168 | Author: homan | Hits:

[VHDL-FPGA-Verilog] xilinx_DDR3-ctl_code

Description: VHDL语言，xilinx,ddr3 控制代码，已实现-VHDL xilinx DDR3ctl code
Platform: | Size: 101376 | Author: 朱陈喜 | Hits:

[source in ebook] DDR3-SDRAM-Verilog-Model

Description: ddr3模型以及代码和测试程序，不过带有小瑕疵-ddr3 model and code and test procedures, but with small flaws
Platform: | Size: 61440 | Author: 陈国旗 | Hits:

[Other Riddle games] DDR3_controller

Description: DDR3的控制器程序，可烧录到FPGA中对内存进行读写，可在该代码上修改用于其他场合。-DDR3 controller program, are programmed into the FPGA, memory read and write, you can modify the code used on other occasions.
Platform: | Size: 55296 | Author: 王伟 | Hits:

[VHDL-FPGA-Verilog] MT9M001

Description: FPGA驱动MT9M001的verilog代码，里面还有ddr3部分将图像数据进行存储，lcd进行图像显示，里面的摄像头驱动部分很详细，大家可以多研习研习-Verilog driver MT9M001 code, which is also the DDR3 image data storage, LCD display, which drives the part is very detailed, we can learn more
Platform: | Size: 2494464 | Author: 王崎 | Hits:

[VHDL-FPGA-Verilog] ddr3_verilog

Description: DDR3读写在FPGA上的实现代码，经测试通过-DDR3 read and write FPGA implementation of the code, the test passed
Platform: | Size: 7238656 | Author: tengdaizhou | Hits:

[VHDL-FPGA-Verilog] DDR3 SDRAM Verilog Model

Description: ddr3的逻辑带么参考，有需要的可以看一下。。。。。。。。。(ddr3 ssscoede code code code)
Platform: | Size: 70656 | Author: sss911 | Hits:

[VHDL-FPGA-Verilog] 11_ddr3_test

Description: Xilinx Spartan-6 DDR3 test code
Platform: | Size: 7422976 | Author: _TT | Hits:

[VHDL-FPGA-Verilog] ddr3_test_top

Description: DDR3 test code 測試用的代碼 學習用,簡單的使用DDR3(DDR3 test code for learning verilog code study.)
Platform: | Size: 2048 | Author: JONESCHENG | Hits:

[Embeded Linux] evm816x_test

Description: 该代码功能是在CCS上实现DM8168的各个核心模块的检测，例如：DDR3测试等。(The function of the code is to realize the detection of each core module of DM8168 on CCS, such as: DDR3 test, etc..)
Platform: | Size: 1869824 | Author: yyso | Hits:

[Other] ddr3_test

Description: ddr3相关代码和基于ISE仿真调试，板级调试(DDR3 related code and simulation debugging based on ISE, board level debugging)
Platform: | Size: 7467008 | Author: 田中泥 | Hits:

[assembly language] ddr3

Description: ALINX7010 ddr3读写测试仿真实验官方教程 附说明和代码 Vivado 实现(Alinx7010 DDR3 read write test simulation experiment official course Description and code attached Vivado implementation)
Platform: | Size: 3036160 | Author: 心素如简 | Hits:

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